Janet M Sickler

20060250731, Nov 9, 2006

May 3, 2005

11/121401

Ray Parkhurst - Fremont CA, US
Ron Ruebusch - Saratoga CA, US
Chi Jiaa - San Jose CA, US
Janet Sickler - Morgan Hill CA, US

H02H 9/00

361056000

A system and method for implementing an electronic circuit for protecting electronic components from ESD. A PCB or IC may include an electrostatic discharge protection layer having a first and second conductive layer separated by a semi-conductive dielectric layer. Further, the PCB/IC may include a protected node coupled to the first conductive layer and a current-shunt node electrically coupled to the second conductive layer, such that a signal at the protected node that is below a threshold magnitude propagates through the protected node in a normal operating path and a signal at the protected node that exceeds a threshold magnitude is diverted to the semi-conductive dielectric layer to the current-shunt node in a current-shunt path. In this manner, existing layers of a PCB/IC may be used for both ESD protection and other functions, such as ground planes or battery plane by isolating the specific sections of the layer for its intended use.